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19-3423; Rev 0; 10/04
MAX9850 Evaluation System/Evaluation Kit
General Description
The MAX9850 evaluation system (EV system) consists of a MAX9850 evaluation kit (EV kit), a companion Maxim command module (CMOD232) interface board, and software. The MAX9850 EV kit is a fully assembled and tested surface-mount circuit board that evaluates the MAX9850 headphone stereo DAC with integrated headphone driver. The EV kit is designed to be driven by any digital audio Sony/Philips Digital Interface (S/PDIF) audio source and can be optionally configured to accept generic digital audio or I2S-compatible signals. The EV kit provides RCA jacks for connecting analog input signals. A 3.5mm headphone jack allows for easy connection of headphones to the circuit board. The Maxim command module interface board (CMOD232) allows a PC to use its serial port to emulate an I2CTM 2-wire interface. Windows(R) 98/2000/XP-compatible software, which can be downloaded from the Maxim website, provides a user-friendly interface to exercise the features of the MAX9850. The program is menu driven and offers a graphical user interface (GUI) with control buttons and a status display. The MAX9850EVCMOD2 includes both the EV kit and the CMOD232 interface board. Order the MAX9850EVKIT if you already have a command module interface.
Features
1.8V to 3.6V Single-Supply Operation I2C-Compatible 2-Wire Serial Interface Selectable Optical/Electrical S/PDIF Input On-Board 12MHz Crystal Oscillator On-Board Digital Audio Receiver No Detectable Clicks or Pops Easy-to-Use Menu-Driven Software Assembled and Tested Includes Windows 98/2000/XP-Compatible Software and Demo PC Board
Evaluate: MAX9850
Ordering Information
PART MAX9850EVKIT I2C IC INTERFACE PACKAGE TYPE 0C to +70C 28 TQFN Not included TEMP RANGE CMOD232
MAX9850EVCMOD2 0C to +70C 28 TQFN
Note: The MAX9850 EV kit software is provided with the MAX9850EVKIT; however, the CMOD232 board is required to interface the EV kit to the computer when using the included software.
Component List
DESIGNATION QTY DESCRIPTION 220F 20%, 6.3V tantalum capacitors (C-case) AVX TPSC227M006R0250 or AVX TPSC227M006R0100 Not installed, capacitors (C-case) 10F 20%, 6.3V X5R ceramic capacitors (0805) TDK C2012X5R0J106M 1.0F 20%, 6.3V X5R ceramic capacitors (0402) TDK C1005X5R0J105M 2.2F 20%, 6.3V X5R ceramic capacitor (0603) TDK C1608X5R0J225M 0.47F 20%, 16V X7R ceramic capacitor (0603) TDK C1608X7R1C474M
C1, C2 C3, C4 C5-C8 C9-C12, C15-C23, C30, C31, C37, C43 C13
2 0 4
17
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Windows is a registered trademark of Microsoft Corp. I2C is a trademark of Philips Corp. Purchase of I2C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
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________________________________________________________________ Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Component List (continued)
DESIGNATION C24-C29, C35, C44, C45 C32, C33, C34, C36, C38, C39 QTY 9 DESCRIPTION 0.1F 20%, 10V X5R ceramic capacitors (0402) TDK C1005X5R1A104M 0.01F 5%, 25V C0G ceramic capacitors (0603) TDK C1608C0G1E103J 0.022F 10%, 25V X7R ceramic capacitor (0402) TDK C1005X7R1E223K 1000pF 5%, 50V C0G ceramic capacitor (0603) TDK C1608C0G1H102J Not installed (0603) 2 x 10 right-angle female receptacle Digital audio optical receiver Toshiba TORX141P Phono jacks, red Phono jacks, white Phono jack, yellow Switched stereo headphone jack (3.5mm dia.) SMA PC-mount connector 8-pin header Jumper, dual row, 6-pin header Jumper, 2-pin header Jumper, 3-pin header 3.3H 10%, 270mA inductor (1812) Coilcraft 1812CS-332XKB 47H 10%, 200mA inductor (1812) Coilcraft 1812LS-473XKB 10k 5% resistors (0603) 1k 5% resistor (0603) 47k 5% resistor (0603) U8 Y1 None None None 1 1 3 1 1 U6, U7 2 U5 1 U3 1 DESIGNATION R5 R6, R7, R8, R12 R9, R10 R11 R14 R15 SW1 U1 QTY 1 0 2 1 0 1 0 1 DESCRIPTION 75 5% resistor (0603) Not installed, resistors (0603) 1k 5% resistors (0402) 3.01k 1% resistor (0603) Not installed, resistor (1206) 4.7k 5% resistor (0603) Not installed Maxim MAX9850ETI (28-pin TQFN, 5mm x 5mm) 192kHz digital audio receiver (TSSOP-28) Cirrus Logic CS8416-CZ Maxim MAX1840EUB (MAX(R)-10) 16-bit, dual-supply bus transceiver (TSSOP-48) Texas Instruments SN74AVCAH164245GR Maxim MAX6736XKTGD3 (SC70-5) top mark = AFS 2:1 noninverting multiplexers (SC70-6) Fairchild Semiconductor NC7SV157P6X, top mark = VF7 Noninverting buffer (SC70-5) Fairchild Semiconductor NC7SV17P5X, top mark = V17 Low-jitter crystal clock oscillator Shunts MAX9850 PC Board Software Disk (CD-ROM) MAX9850 Evaluation Kit
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C40
1
C41 C42 J1 J2 J3, J5 J4, J6 J7 J8 J9 J10 JU1 JU2 JU3 L1 L2 R1, R2, R13 R3 R4
1 0 1 1 2 2 1 1 1 1 1 1 1 1 1 3 1 1
U2
1
U4
1
Component Suppliers
SUPPLIER AVX Coilcraft TDK PHONE 843-946-0238 847-639-6400 847-803-6100 FAX 843-626-3123 847-639-1469 847-390-4405 WEBSITE www.avxcorp.com www.coilcraft.com www.component.tdk.com
Note: Indicate that you are using the MAX9850 when contacting these component suppliers. MAX is a registered trademark of Maxim Integrated Products, Inc. 2 _______________________________________________________________________________________
MAX9850 Evaluation System/Evaluation Kit
Quick Start
Recommended Equipment
* Computer running Windows 98, 2000, or XP * Serial port (this is a 9-pin socket on the back of the computer) * Standard 9-pin, straight-through, male-to-female cable (serial extension cable) to connect the computer's serial port to the Maxim command module interface board * CMOD232 command module with included wall cube power source * Two 3.0V/100mA DC power supplies * One pair of headphones (16 or greater) * One digital audio S/PDIF signal source 4) Connect the second 3.0V power supply to the PVDD and corresponding GND pads. 5) Connect the S/PDIF signal source to either J2 (optical) or J7 (electrical) 6) Insert a pair of 16 headphones into the headphone jack J8. 7) Carefully align the 20-pin connector of the MAX9850 EV kit with the 20-pin header of the CMOD232 interface board. Gently press them together. 8) The MAX9850.EXE software program can be run from the CD-ROM or hard drive. Use the INSTALL.EXE program to copy the files and create icons in the Windows 98/2000/XP Start menu. 9) Plug the CMOD232 wall cube into an electrical outlet. 10) Turn on both of the 3.3V power supplies 11) Enable the stereo audio sources. 12) Start the MAX9850 program by opening its icon in the Start menu. 13) Normal device operation can be verified by the "Status: MAX9850 Operational" text in the Interface box. 14) To autoconfigure the MAX9850 in a functional state, use the "auto setup" feature in the MAX9850 software.
Evaluate: MAX9850
Procedure
The MAX9850 EV kit is fully assembled and tested. Follow the steps below to verify board operation. Do not turn on the power supply until all connections are completed. Command Module Setup: 1) Enable the SDA/SCL pullup resistors on the command module by setting both switches (SW1) to the on position. 2) Set the command module working voltage to 3.3V by placing a shunt across pins 1-2 of the VDD select jumper. 3) Connect a cable from the computer's serial port to the command module (CMOD232) interface board. Use a straight-through 9-pin male-to-female cable. To avoid damaging the EV kit or your computer, do not use a 9-pin null-modem cable or any other proprietary interface cable that is physically similar to the straight-through cable. 4) Connect the provided wall cube power supply to the CMOD232 board. EV Kit Setup: 1) Ensure that the I2C address of the MAX9850 is set to 0x20h by verifying that a shunt is placed across pins 1-2 of jumper JU1. 2) Ensure that a shunt is installed on jumper JU2 3) Connect the first 3.0V power supply to the DVDD and corresponding GND pads.
Detailed Description of Software
Note: Words in bold are user-selectable features and status flags in the software.
User-Interface Panel
The user interface (Figure 1) is easy to operate; use the mouse, or a combination of the Tab and Arrow keys to manipulate the software. Each of the buttons corresponds to bits in the command and configuration bytes. By clicking on them, the correct I2C write operation is generated to update the internal registers of the MAX9850 or the on-board S/PDIF receiver. The software divides EV kit functions into logical blocks. The Interface box indicates the current Device Address, the Register Address, and the Data Sent/Received for the last read/write operation. This data is used to confirm proper device operation. Headphone, Power, Clock Setup, Digital Audio/ Configuration, and Receiver functions are accessed
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 1. MAX9850 EV Kit Software Main Window
through tab sheets. MAX9850 status and interrupt control are accessed through the MAX9850 Status box. The status bar displays vital MAX9850 clock information. Return the EV kit to its power-on-reset state by clicking the POR Reset button. Power up the MAX9850 by clearing the MAX9850 Global Shutdown checkbox. Power up the receiver (U2) by selecting the Receiver Shutdown checkbox. The MAX9850 EV kit software features additional functions to simplify operation. Automatic Diagnostics probes the command module board and the MAX9850
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EV kit to make sure that all connections are made, and all devices are working. This will create some activity on the I2C bus. The Silence I2C Activity checkbox will reduce I2C bus activity to allow easy triggering of an oscilloscope. The Auto Setup button further reduces user input. When this button is pressed, the software will do the following: 1) Search both EV kit S/PDIF inputs for a valid signal and then set the on-board multiplexer accordingly.
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MAX9850 Evaluation System/Evaluation Kit
2) Power up the receiver IC as well as vital sections of the MAX9850. 3) Set internal clock dividers based on the incoming master clock frequency. 4) Set the MSB(14:8) and LSB(7:0) bits based on the desired mode of operation. 5) Set the charge-pump clock division bits if the MAX9850 is not using the internal oscillator. The Auto Setup button is intended to simplify user interaction by placing the EV kit into a known-good mode of operation. To disable continuous polling of data, uncheck the Automatic Status Read checkbox. Force a manual status register read by clicking the Read Status button. If an interrupt condition is generated, the message INTERRUPT appears next to the interrupt status label. If enabled, the program will disable automatic reading of the status register.
Evaluate: MAX9850
Status Bar
The status bar (Figure 3) displays the MAX9850 master clock, internal clock, and charge-pump clock frequencies. By default it is updated automatically; however, this feature can be turned off (see the Clock Setup section).
MAX9850 Status/Interrupt
The MAX9850 EV kit software defaults to a state that continually polls the device for new status data and monitors the alert conditions. The contents of the status register are displayed in the MAX9850 Status group box (Figure 2). Changes in the GPIO state, PLL lock, headphones present, volume, and output overload can be set to trigger an interrupt by checking the checkbox next to the desired information.
Headphone Control
The Headphones tab (Figure 1) allows access to the MAX9850 headphone-related controls. Headphone volume can be adjusted in dB increments by adjusting the Volume Control slider. The dB increments are not evenly spaced and are detailed further in the MAX9850 data sheet. Alternatively, a number can be entered in the box below the Volume Control slider. If a number that does not match a predefined dB increment is entered, the software automatically rounds the number to the nearest valid dB increment and sends the appropriate I2C data to the MAX9850. Mute the HP output by selecting the Mute checkbox. Additional headphone control is also provided through the Headphone Features box. Slew Rate Control is controlled through the respective check and dropdown boxes. Zero-Crossing Detection and Debounce Delay are also controlled through the interface. For a detailed description of zero-crossing detection and debounce delay, refer to the MAX9850 data sheet. Clicking the Force Headphone Mono Mode checkbox mutes the right channel and outputs a left/right-channel mix on the left channel.
Power Management
Power-Management features of the MAX9850 are accessed through the Power tab (Figure 4). Power enables for the MCLK input, charge pump, line out, line in, DAC input, and headphone output are accessed through the Power-Management box.
Figure 2. MAX9850 EV Kit Software Status Window
Figure 3. MAX9850 EV Kit Software Status Bar
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 4. MAX9850 EV Kit Software Power Tab
The MAX9850 charge pump can operate either an internal 666.7kHz oscillator or frequency derived from the master clock. Force the MAX9850 to use the internal oscillator by checking the Use Internal Oscillator checkbox. When the Use Internal Oscillator checkbox is unchecked, set the charge-pump clock divider by adjusting the Clock Division Ratio slider. Refer to the MAX9850 data sheet for further details about clockdivider operation.
By default, the MAX9850 EV kit software writes to the registers when a control is activated. To shut down more that one item during the same I2C write operation, click the Simultaneous Shutdown checkbox. Adjust the other power-control checkboxes to the desired mode of operation and click the GO button. The proper register contents for the new selections will be sent in one I2C write command.
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 5. MAX9850 EV Kit Software Clock Setup Tab
Clock Setup
Clock configuration features of the MAX9850 are accessed through the Clock Setup tab (Figure 5). On-board multiplexers route a high-frequency square wave to the MAX9850 MCLK input. Select Recovered Master Clock to use the S/PDIF master clock. Select On-Board Crystal Oscillator to use the 12MHz crystal oscillator. Alternatively, a User Provided Clock can be applied to J9 of the MAX9850 EV kit. Enter the correct
frequency in the Frequency box just below the User Provided Clock selection. Depending on the desired mode of operation (see the MAX9850 Mode Setup section) digital audio data can be synchronized to the master clock signal. The on-board S/PDIF receiver performs the synchronization of the digital audio data to the chosen MAX9850 master clock signal. To synchronize the digital audio to the MAX9850 master clock, check the Synchronize Data with Clock checkbox. Note: When using the Recovered Master Clock as the
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 6. Master (Noninteger) Mode
Figure 7. Master (Integer) Mode
The MAX9850 uses a frequency-divided master clock signal throughout the IC (see the MAX9850 Mode Setup section). Select the desired internal clock-divider ratio from the Internal Clock Divider Ratio pulldown. The MAX9850 EV kit software is capable of calculating the master clock, internal clock, and charge-pump clock frequencies. Press the Update Clocks in Status Bar button to display the calculated values. Checking the Automatically Update Clocks checkbox will update the calculated values on a regular basis. MAX9850 Mode Setup The MAX9850 Mode Setup window alters its appearance depending on which mode is selected. Figures 6-9 show the different appearances of these windows. Both Master (Noninteger) and Master (Integer) modes of the MAX9850 EV kit software (Figures 6 and 7) are similar in operation. Select Manual Control to write directly to the MAX9850 registers. Enter the number in the MSB/LSB in Master (Noninteger) and LSB in Master (Integer) mode edit box and press the Update button to write to the MAX9850. Alternatively, the Automatic mode can be selected and a desired Left/Right Clock frequency can be entered into the Desired LRCLK Freq edit box. The EV kit software will automatically calculate the correct MSB/LSB values and write them to the MAX9850 registers.
Figure 8. Slave (Noninteger) Mode
master clock frequency, the digital audio data will always be synchronized.
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MAX9850 Evaluation System/Evaluation Kit
receiver match. When the Word Size/Lock checkbox is checked, the EV kit software will ensure that the word size settings for both the MAX9850 and the on-board S/PDIF receiver match. For example, if the MAX9850 BCLK Invert checkbox is altered, the MAX9850 EV kit software automatically changes the Receiver BCLK Invert checkbox to match. All appropriate I2C data will be sent to both ICs and the system will continue to function properly. Note: Unchecking either of the lock checkboxes will allow the software to operate in a state that may not be functional. Undesirable results may occur. The GPIO of the MAX9850 is also configured on this tab. Click the desired radio button to alter the pin direction or the GPIO Output State. To route the MAX9850 internal interrupt signal to the GPIO pin, check the Enable Interrupt on GPIO checkbox.
Evaluate: MAX9850
Receiver
The MAX9850 EV kit software also controls the onboard S/PDIF receiver. Receiver control and status are divided into two tabs. Receiver Main Control Receiver control is accessed through the Main Control sub-tab, which is located under the Receiver tab (Figure 11). Choose the desired S/PDIF input (Optical or Electrical) in the Digital Audio Input Selection box. Mute the receiver output by checking the Mute Receiver Output checkbox. Activate the receiver's de-emphasis filter by choosing the desired option in the Receiver DeEmphasis Filter box. The on-board digital receiver features programmable error handling. Choose the desired method for handling S/PDIF errors in the Audio Error Handling box. Receiver Status Receiver status is accessed through the Status subtab, which is under the Receiver tab (Figure 12). This tab serves as an invaluable diagnostic tool when evaluating the MAX9850 EV kit. Read the error status by clicking the Read Status button in the Receiver Error Status window. The Monitor checkboxes must be selected for the status bits to be valid. Click the Read Status button in the Status box to read the receiver status. To have the software automatically read the receiver status at constant time intervals, check the Automatic Read checkbox.
Figure 9. Slave (Integer) Mode
The Slave (Noninteger) (Figure 8) mode of the MAX9850 does not rely on the MSB or LSB registers for operation. Slave (Integer) (Figure 9) mode can be operated manually by entering a number in the LSB edit box. When using the Automatic mode, the MAX9850 EV kit software calculates the correct LSB value and writes it to the appropriate IC register.
Digital Audio/Configuration
Digital audio control and miscellaneous configuration options are accessed through the Digital Audio/ Configuration tab (Figure 10). In addition to a serial data delay, the MAX9850 can also accept an inverted bit clock (BCLK) or left/right clock (LRCLK). Configure the MAX9850 by checking the desired Invert or Delay checkboxes. Choose the desired Data Format and Justification from the pulldowns. The MAX9850 EV kit software is designed to control both the on-board S/PDIF receiver chip as well as the MAX9850. To maintain a valid digital link between the two ICs, the MAX9850 EV kit software features a Lock checkbox in both the Signals and Word Size group boxes. When the Signals/Lock checkbox is checked, the EV kit software will ensure that BCLK Invert, LRCLK Invert, SDIN/SDOUT Delay, and Justification settings for both the MAX9850 and the on-board S/PDIF
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 10. MAX9850 EV Kit Software Clock Setup Tab
Simple I2C Commands
There are two methods for communicating with the MAX9850: through the normal user-interface panel or through the I2C commands available by selecting the 2-Wire Interface Diagnostic item from the Options pulldown menu. A window is displayed that allows I2C operations, such as read byte and write byte, to be executed. To stop normal user-interface execution so that it does
not override the manually set values, turn off the update timer by deselecting the Automatic Status Read and Automatic Diagnostics checkboxes. The I2C dialog boxes accept numeric data in binary, decimal, or hexadecimal. Hexadecimal numbers should be prefixed by $ or 0x. Binary numbers must be exactly eight digits. See Figure 13 for an example of this control method.
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 11. MAX9850 EV Kit Software Receiver (Main Control) Tab
Note: In places where the slave address asks for an 8bit value, it must be the 7-bit slave address of the MAX9850 as determined by ADD with the last bit set to 1 for a read operation or a 0 for a write. Refer to the MAX9850 data sheet for a complete list of registers and functions.
Detailed Description of Hardware
The MAX9850 EV kit is a complete digital-audio headphone-driver evaluation system. The EV kit is driven by either an optical or electrical S/PDIF digital audio source. The S/PDIF signal is converted through onboard circuitry to compatible digital audio signals. The MAX9850 interfaces with the digital audio signals and drives a pair of headphones.
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 12. MAX9850 EV Kit Software Receiver (Status) Tab
Access to the MAX9850 analog inputs and outputs, is provided through RCA jacks J3-J6. Access the MAX9850 headphone outputs through the headphone jack J8 or the provided LEFT, RIGHT, and GND pads. The EV kit also features on-board level translators that allow the on-board S/PDIF receiver to communicate with the MAX9850 over the entire MAX9850 VDD voltage range (1.8V to 3.6V). The CMOD232 command module powers half of the on-board level translators.
For optimum performance, digital audio systems require a stable frequency source. The MAX9850 EV kit features an on-board 12MHz crystal oscillator. In addition, the MAX9850 EV kit can also use a user-provided signal source that is connected to J9. Alternatively, the S/PDIF recovered clock can be used. The MAX9850 ev kit software controls which clock signal is routed to the MCLK input (see the Clock Setup section for more details).
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 13. The above example shows a simple SMBusWriteByte operation using the included Two-Wire Interface Diagnostics. In this example, the software is writing data (0x00h) to Device Address 0x20h, Register Address 0x02h. The above data sequence will set the volume of the MAX9850 to max.
Address Selection
Jumper JU1 sets the MAX9850 I2C slave address. The default address is 0010 000Y (ADD = GND). See Table 1 for a complete list of addresses. Note: The first 7 bits shown are the address. Y (bit 0) is the I2C read/write bit. This bit is a 1 for a read operation or a 0 for a write.
Manual Headphone Sense Control
To simulate a pair of headphones being inserted into the headphone jack J8, remove the shunt from jumper JU2. Connect the load to the LEFT, RIGHT, and GND pads located by the headphone jack J8. See Table 2 for jumper settings.
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Table 1. JU1 Shunts Settings for I2C Address (JU1)
SHUNT POSITION 1-2* 3-4 5-6 MAX9850 ADDRESS PIN GND AVDD SDA MAX9850 ADDRESS BINARY 0010 000Y 0010 001Y 0010 011Y HEXADECIMAL 0x20h 0x22h 0x26h
If the on-board digital receiver IC is to be used with an alternative I2C interface, connect a 3.3V power supply between the VMOD and GND pads on the MAX9850 EV kit. The I2C address of the digital receiver is fixed at 0x28.
Using an Alternative Digital Audio Interface
The MAX9850 EV kit features a digital receiver that converts readily available S/PDIF signals to the required digital audio signals needed for the MAX9850. If an alternative digital audio interface is to be used, connect the interface to header J10, check Disconnect Receiver. Header pin names are clearly marked on the EV kit silkscreen. Ensure that the command module is disconnected from the EV kit during this mode of operation.
*Default Configuration: JU1 (1-2)
Table 2. Manual Headphones Sense Control (JU2)
SHUNT POSITION Installed* Not Installed DESCRIPTION MAX9850 EVKIT headphone sense controlled by the insertion of headphones. MAX9850 EVKIT headphone sense switch forced open.
Synchronizing the EV Kit (Master Modes)
While in master mode, the MAX9850 supplies the LRCLK signal and thus controls the digital audio sample rate. To allow synchronization between the MAX9850 and the S/PDIF sample source, the LRCLK signal is buffered and output to a set of pads on the EV kit. Connect the synchronization input of the S/PDIF sample source to the LRCLK and GND pads (Figure 14). The LRCLK signal is 3.3V CMOS compatible.
*Default Configuration: JU2 (Installed)
Table 3. GPIO Pullup Register (JU3)
SHUNT POSITION 1-2* DESCRIPTION GPIO pin pulled up to 3.3V. Monitor GPIO signal at the GPIO pad. GPIO pin left open. Connect a pullup resistor to the desired voltage. Monitor GPIO signal at the GPIO_OPEN pad.
S/PDIF SIGNAL SOURCE LRCLK IN S/PDIF OUTPUT
2-3
*Default Configuration: JU3 (1-2)
GPIO Interface
The MAX9850 EV kit features an on-board pullup resistor on the MAX9850 GPIO pin. Jumper JU3 can disconnect this pin from the pullup resistor.
GND LRCLK
MAX9850
OPTICAL J8 ELECTRICAL
Using an Alternative I2C Interface
The MAX9850 EV kit provides pads and pullup resistor placeholders that allow an alternative I2C-compatible interface to be used. Connect the interface through the SCL, SDA, and GND pads. Install pullup resistors at positions R7 and R8, if required.
OPTIONAL
Figure 14. Synchronized MAX9850 EV Kit Diagram
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VMOD L1 3.3H DVDD C3 OPEN C9 1.0F GND R14 SHORT (PC TRACE) VMOD C43 1.0F VMOD C28 0.1F C15 1.0F VDD VCC C5 10F C4 OPEN C6 10F C10 1.0F PVDD
VA
VDD
VCC
C7 10F GND
C11 1.0F
C38 0.01F
C8 10F
C12 1.0F
C39 0.01F
C1 220F 6.3V
C2 220F 6.3V
C24 0.1F
L2 47H
VMOD
3 VCC
4 C19 VA 1.0F C27 0.1F 6 VA 4 RXP0 RXP1 47 1A1 1A2 DVDD OUTR 1A3 1A4 J10-1 J10-2 J10-3 MCLK 5 U1 OUTL 12 1A5 1A6 1A7 1A8 13 J10-5 BCLK C31 1.0F LRCLK INL 10 2 1 J6 1 14 16 J10-6 DSDA 17 19 J10-7 J10-8 28 DSCL 4 48 1OE 1OE 25 27 SCL HPS 21 JU2 3 2 1 DGND AGND 22 7 1DIR 2DIR SDA DATA VMOD 2 C17 1.0F DVCC U3 VCC 9 C18 1.0F 1 I/O 10 8 HPL GPIO VDD NREG PREG REF 15 16 13 LEFT 19 VMOD C41 1000pF C40 0.022F GND GND GND GND GND GND GND GND 45 39 34 28 21 15 10 4 24 R11 I2S_M/S 3.01k 1% 1 GND J8 SDA HPR 18 20 22 23 2 1B8 12 J10-4 SDIN INR 36 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2B8 2B7 2B6 2B5 2B4 2B3 2B2 2B1 35 LRCLK 32 9 RST 29 VMOD 27 26 AD2/GPO2 AD1/CDIN AD0/CS FILT 8 I2S_OE R1 10k R2 10k 18 15 14 VMOD 30 33 9 3 1B7 11 1B6 9 U4 SN74AVCAH164245 1B5 8 1B4 6 1B3 5 C37 1.0F 1B2 3 4 SDA SCL 11 1B1 GPO0 44 VMOD GPO1 41 R15 4.7k 40 38 37 RMCK SDOUT OSCLK OLRCLK 28 27 26 24 RMCK U4_38 43 U2 CS8416 GPO1 19 20 GPO0 46 R9 1k 2 RXP2 RXP3 RXP4 RXP5 RXP6 RXP7 VDD 20 22 SVSS PVSS 25 C1P 23 C1N 26 17 PVDD AVDD OMCK OMCK 3 2 1 10 11 12 13 25 42 31 VCCA VCCA 18 7 VCCB VCCB 23 21 VD VL C14 0.47F C16 1.0F C29 0.1F C13 2.2F C20 1.0F C26 0.1F
N.C.
J2
OUTPUT
1
C32 0.01F
5
N.C.
R6 OPEN
GND 2
C33 0.01F
2
J7
1
2 1 R10 1k J3
R5 75
2 1 C30 1.0F 2 1 J5 J4
Figure 15a. MAX9850 EV Kit Schematic (1 of 2)
MAX9850
5 RXN 16 SCL/CCLK SDA/CDOUT 17 RIGHT
C34 0.01F
VMOD
C25 0.1F
SCL
U5_4
SDA
4 VCC2
5 VCC1
VMOD
R3 1k
U5
3
MAX6736
MR
RESET
1
VMOD
SW1
GND 2
R4 47k
VMOD
GND
J1-2
J1-1 SCL SDA VMOD VMOD 3 CIN
MAX1840
DGND 6
PGND 24
AGND 14
ADD
7
C21 1.0F
C22 1.0F
C23 1.0F
J1-4
J1-3
CLK SCL SDA U5_4 SDA R8 OPEN SCL R7 OPEN SCL VMOD N.C. 5 4 RIN RST
8 VMOD 7 R13 10k SHDN GND 6 1 23 JU3 GPIO_OPEN GPIO ADD DSDA JU1-1 JU1-3 JU1-5 JU1-2 VDD JU1-4 JU1-6 ADD ADD ADD
J1-5
J1-7
J1-6
J1-13
J1-8
J1-9
J1-10
J1-11
J1-12 I2S_OE
J1-15
J1-14
J1-17
I2S_M/S
J1-16
J1-19
MAX9850 Evaluation System/Evaluation Kit
Evaluate: MAX9850
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N.C.
J1-18
J1-20
15
MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
J9 C42 OPEN R12 OPEN VMOD 4 C36 0.01F VCC OUT Y1 GND OE 3 1 I1
VMOD C35 0.1F
3
5 VCC IO U6 NC7SV157 4 VMOD
Z
2
1
6
S GND 2 3 5 VCC IO U7 NC7SV157 I1
C44 0.1F
CB3LV
RMCK GPO0 OMCK
1
Z
4
U4_38
GPO1 VMOD C45 0.1F U8 5 LRCLK 2 3 GND 4 LRCLK
6
S GND 2
Figure 15b. MAX9850 EV Kit Schematic (2 of 2)
16
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MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 16. MAX9850 EV Kit Component Placement Guide--Component Side
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17
MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 17. MAX9850 EV Kit PC Board Layout--Component Side 18 ______________________________________________________________________________________
MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 18. MAX9850 EV Kit PC Board Layout--Inner Layer 2
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19
MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 19. MAX9850 EV Kit PC Board Layout--Inner Layer 3 20 ______________________________________________________________________________________
MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 20. MAX9850 EV Kit PC Board Layout--Solder Side
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21
MAX9850 Evaluation System/Evaluation Kit Evaluate: MAX9850
Figure 21. MAX9850 EV Kit Component Placement Guide--Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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